Coding for Memories and Storage

Modeling, Coding, and Data Coding Theoretic and Combinatorial Methods for Next-Generation Storage Systems and Memories
  • Advanced graph based and algebraic codes for ultra dense non-volatile memories

  • Advanced graph based coding methods for future HDDs

  • Asymmetric coding for Flash

  • Erasure coding for on chip memories

  • Channel modeling and analysis

  • New data representation schemes

 

Overview: All modern data storage systems and memories require increasingly high  levels of reliability. While channel coding methods have been a reliable workhorse since the early days of computer storage, conventional techniques are no longer appropriate in the context of new applications: traditional methods are almost universally designed to optimize for the Hamming metric, yet modern memories and storage exhibit a very high levels of asymmetry and non-uniformity. Using symmetric error correcting codes in such applications is not only mathematically suboptimal but also wasteful of precious system resources.

 

Recent results: In our work, we deliberately depart from optimizing for the Hamming metric and focus on code designs that are attuned to the physical characteristics of the underlying devices. We explore a variety of innovative code construction techniques, by combining  tools from combinatorial graph theory, convex optimization, and abstract algebra.  Our rich code repertoire includes many state of the art constructions for an array of different applications.

Additionally, we offer system level perspectives of our mathematical solutions for a broad spectrum of applications, from on-chip memories to Flash to magnetic recording.

Current research is on the development of novel methods of asymmetric coding for NVMs and multidimensional codes for ultra dense storage.

Our group has a distinguished record of research contributions in this domain.

Representative recent publications include both review articles and original contributions:

Review articles

Graph-based codes for Flash and HDDs.

  • A. Hareedy, C. Lanka, C. Schoeny, and L. Dolecek, “The Weight Consistency Matrix Framework for General Non-Binary LDPC Code Optimization: Applications in Flash Memories,” Proc. IEEE International Symposium on Information Theory (ISIT), Barcelona, Spain, July 2016.
  • A. Hareedy, B. Amiri, R. Galbraith, and L. Dolecek, “Non-Binary LDPC Codes for Magnetic Recording Channels: Error Floor Analysis and Optimized Code Design”, submitted 2015.
  • A. Hareedy, B. Amiri, S. Zhao, R. Galbraith, and L. Dolecek, “Non-Binary LDPC Code Optimization for Partial Response Channels,”  in Proc. IEEE Globecom, Dec. 2015. Best paper award. 

 

Algebraic Codes and Signal Processing for NVMs.

Coding for on-chip memories.

  •  F. Sala, H. Duwe, L. Dolecek, and R. Kumar, “A Unified Framework for Error Correction Techniques in On-Chip Memories,” SELSE Workshop and DSN Conference, 2016. Best of Selse Award.